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SystemC-based design has emerged as the standard at the center of the
transaction-level ESL design and verification flow. Behavioral synthesis
using SystemC takes advantage of the ESL design flow, the SystemC hardware
constructs, and the power of C++ to extend high-level design from ESL to
RTL.
For over 20 years, system design theorists have searched for a practical
way to implement a "meet-in-the-middle" design process. They found it
difficult to express and validate possible hardware implementations
combined with the system and software architecture. The missing element had
been a language that could support design and verification from concept to
implementation for hardware and software.
SystemC has emerged as the language that meets these requirements. In
2005, the IEEE established the P1666 SystemC standard for system-level chip
design. SystemC provides hardware-oriented constructs within the context of
C++ as a class library implemented in standard C++. With the adoption of
SystemC as an IEEE standard, the availability of EDA tools and IP continues
to expand and the design community is increasingly using a SystemC-based
flow.
SystemC has all of the necessary constructs to support a wide spectrum
of electronic design requirements from ESL and system design down to
block-level, extending all the way from system software to RTL. Design
teams can describe system-level and block-level detail with the same
language. They can express embedded software and embedded hardware in the
same language. This allows the hardware/software partition decisions to be
made later in the design process.
With SystemC, designers can apply object-oriented capabilities to
hardware design. The C++ capabilities for introducing modularity, such as
classes, inheritance, and overloading, make new kinds of
behavioral IP reuse
possible. By separating communication and functionality, abstract
communication models (transaction-level models) can be synthesized into
models using detailed bus protocols. With behavioral synthesis, abstract
algorithms can be synthesized into optimized RTL implementations.
Forte has been long time supporter of SystemC, with
Cynthesizer
delivering behavioral synthesis and verification of the language since its
inception. Forte committed the IEEE standard in its product development and
has taken a leading role within OSCI for development of an open source
library that implements the IEEE 1666 semantics.
For more information, check out:
Forte and SystemC
SystemC Training
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