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Forte has assembled a team of experienced leaders with very diverse
individual experiences in EDA, software, and semiconductors.
Mr. Dart joined Forte in 1997 and has over 20 years of
software design experience, with 14 of those years in EDA. Prior to joining
Forte, he was the CTO of Speed Electronics S.A., a company specializing in
front-end design tools for logic synthesis flows. Prior to Speed, Mr. Dart
held a number of software management and development positions in the fields
of telecommunications and operating systems development. Mr. Dart graduated from the University of N.S.W. in Sydney, Australia.
Before joining Forte in 1999, Mr. Cline was Director of
Marketing at Summit Design, where he managed both the verification product
line, including HDL Score, and marketing communications; Mr. Cline joined
Summit through their acquisition of Simulation Technologies in 1997. Mr.
Cline has also held positions in development, applications, and technical
marketing at Cadence Design Systems and General Electric. He holds a BSEE
from Northeastern University in Boston, Massachusetts and has served on the
Board of Directors of Provis Corporation in Minneapolis, Minnesota since
2003.
Mr. McGuire has been with Forte since 1991. For the past 15 years, he has worked as a consulting Chief
Financial Officer for a number of technology companies in the Northwest
including Ceptyr Inc., Darwin Molecular, Similring, Adobe Plug-in Source,
and others. Previously he was the V.P. of SeaMed Corporatation and a
consultant with Deloitte Haskins and Sells. He as an MBA from the
University of Southern California and is a Certified Public Accountant.
Dr. Sanguinetti has been active in computer architecture, performance
analysis, and design verification for 20 years. After working for DEC,
Amdahl, ELXSI, Ardent, and NeXT computer manufacturers, he founded
Chronologic Simulation in 1991 and was President until 1995. He was the
principal architect of VCS, the Verilog Compiled Simulator, and was a major
contributor to the resurgence in the use of Verilog in the design community.
Dr. Sanguinetti served on the Open Verilog International Board of Directors
from 1992 to 1995 and was a major contributor to the working group which
drafted the specification for the IEEE 1364 Verilog standard. He was a
co-founder of CynApps. He has 15 publications and one patent. Dr. Sanguinetti's Ph.D. is in Computer and Communication Sciences from the
University of Michigan.
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